Courses – Fakultet tehničkih nauka u Novom Sadu

Subject: Computer-Aided Design of Digital Integrated Circuits (17.EM407A)

Native organizations units: Department of Power, Electronic and Telecommunication Engineering

Type of studies	Title
Undergraduate Academic Studies	Measurement-Information Technologies and Control Engineering (Year: 4, Semester: Winter)
Undergraduate Academic Studies	Measurement-Information Technologies and Control Engineering (Year: 3, Semester: Winter)

General information:

Category	Scientific-professional
Scientific or art field	Electronics
ECTS	7

Gaining knowledge in the field of computer aided design of digital integrated circuits with practical examples

Ability to design and implement CMOS digital circuits (combinational and sequential) Ability to optimize CMOS digital circuits with respect to different constraints: size (cost), speed, power dissipation, and reliability Ability to design, simulate and analyze digital integrated circuits using Cadence

Modern trends of development of modern digital circuits with a large scale of integration. Introduction to the design of digital circuits using a computer. Stick diagrams. Design masks techniques for digital circuits (full-custom and semi-custom). Synthesis of layout, design, simulation and verification. Design rules in the software package CADENCE. Design of basic digital circuit (inverter, OR, NOR, EXOR). Half-adders, full adders, flip-flops. Designing the basic memory elements. Counters. Design of PLA structure. Design of dynamic logic circuits. Using blocks in the design of complex digital circuits. Definition of basic and derived generating layers in CADENCE. Generation of the industry standard files (.CIF, .GDSII). Development of scientific and technical documentation after design.

Lectures. Laboratory practice. The course is based on lectures, where theoretical concepts are explained and illustrated using design examples, and laboratory lessons. Simple digital logic circuits are analyzed using Cadence design tools. During the first part of laboratory work (4 weeks) students are taking this lessons in group of two, learning the Cadence environment. After that, they have to solve problems individually, with the guidance of teaching assistant. Carried out laboratory practices are included with up to 10% in final grade.

Authors	Title	Year	Publisher	Language
Baker, R.J.	CMOS circuit design, layout, and simulation	2008	Wiley-IEEE Press, New Jersey	English
Rabaey, J.M., Chandrakasan, A., Nikolic, B.	Digital Integrated Circuits, 2nd ed.	2003	Pearson, Upper Saddle River	English
Harris, D., Harris, S.	Digital Design and Computer Architecture	2007	Morgan Kaufmann Publishers, Amsterdam	English

Course activity	Pre-examination	Obligations	Number of points
Lecture attendance	Yes	Yes	5.00
Project	Yes	Yes	20.00
Practical part of the exam - tasks	No	Yes	35.00
Computer exercise attendance	Yes	Yes	5.00
Theoretical part of the exam	No	Yes	35.00